EESchema-LIBRARY Version 2.3
#encoding utf-8
#(c) SnapEDA 2016 (snapeda.com)
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
#
# ST25R3911B-AQFT
#
DEF ST25R3911B-AQFT U 0 40 Y Y 1 L N
F0 "U" -600 1230 50 H V L BNN
F1 "ST25R3911B-AQFT" -600 -1400 50 H V L BNN
F2 "QFN50P500X500X100-33N" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "5.0" 0 0 50 H I L BNN "E_MAX"
F5 "" 0 0 50 H I L BNN "BODY_DIAMETER"
F6 "0.18" 0 0 50 H I L BNN "B_MIN"
F7 "" 0 0 50 H I L BNN "THERMAL_PAD"
F8 "5.0" 0 0 50 H I L BNN "E_MIN"
F9 "" 0 0 50 H I L BNN "BALL_COLUMNS"
F10 "" 0 0 50 H I L BNN "BALL_ROWS"
F11 "0.3" 0 0 50 H I L BNN "L_MIN"
F12 "6" 0 0 50 H I L BNN "PARTREV"
F13 "0.3" 0 0 50 H I L BNN "B_MAX"
F14 "ST Microelectronics" 0 0 50 H I L BNN "MANUFACTURER"
F15 "" 0 0 50 H I L BNN "DMAX"
F16 "" 0 0 50 H I L BNN "EMAX"
F17 "5.0" 0 0 50 H I L BNN "D_MAX"
F18 "8.0" 0 0 50 H I L BNN "PIN_COUNT_D"
F19 "0.4" 0 0 50 H I L BNN "L_NOM"
F20 "" 0 0 50 H I L BNN "SNAPEDA_PACKAGE_ID"
F21 "3.5" 0 0 50 H I L BNN "E2_NOM"
F22 "" 0 0 50 H I L BNN "IPC"
F23 "" 0 0 50 H I L BNN "JEDEC"
F24 "IPC 7351B" 0 0 50 H I L BNN "STANDARD"
F25 "" 0 0 50 H I L BNN "PINS"
F26 "3.5" 0 0 50 H I L BNN "D2_NOM"
F27 "" 0 0 50 H I L BNN "PIN_COLUMNS"
F28 "0.5" 0 0 50 H I L BNN "L_MAX"
F29 "5.0" 0 0 50 H I L BNN "D_NOM"
F30 "" 0 0 50 H I L BNN "DMIN"
F31 "0.5" 0 0 50 H I L BNN "ENOM"
F32 "8.0" 0 0 50 H I L BNN "PIN_COUNT_E"
F33 "5.0" 0 0 50 H I L BNN "D_MIN"
F34 "" 0 0 50 H I L BNN "EMIN"
F35 "" 0 0 50 H I L BNN "DNOM"
F36 "5.0" 0 0 50 H I L BNN "E_NOM"
F37 "" 0 0 50 H I L BNN "PACKAGE_TYPE"
F38 "1.0" 0 0 50 H I L BNN "A_MAX"
F39 "" 0 0 50 H I L BNN "VACANCIES"
F40 "0.24" 0 0 50 H I L BNN "B_NOM"
DRAW
S -600 -1300 600 1200 0 0 10 f
X VDD_IO 1 800 1100 200 L 40 40 0 0 W 
X CSO 2 -800 100 200 R 40 40 0 0 O 
X VSP_D 3 800 -500 200 L 40 40 0 0 O 
X XTO 4 -800 400 200 R 40 40 0 0 O 
X XTI 5 -800 500 200 R 40 40 0 0 I 
X VSN_D 6 800 -1000 200 L 40 40 0 0 W 
X VSP_A 7 800 -400 200 L 40 40 0 0 O 
X VDD 8 800 1000 200 L 40 40 0 0 W 
X VSP_RF 9 800 -600 200 L 40 40 0 0 O 
X RFO1 10 800 800 200 L 40 40 0 0 O 
X RFO2 11 800 700 200 L 40 40 0 0 O 
X TRIM1_3 13 800 -100 200 L 40 40 0 0 B 
X VSN_RF 12 800 -1100 200 L 40 40 0 0 W 
X TRIM2_3 14 800 -200 200 L 40 40 0 0 B 
X TRIM1_2 15 800 100 200 L 40 40 0 0 B 
X TRIM2_2 16 800 0 200 L 40 40 0 0 B 
X TRIM1_1 17 800 300 200 L 40 40 0 0 B 
X TRIM2_1 18 800 200 200 L 40 40 0 0 B 
X TRIM1_0 19 800 500 200 L 40 40 0 0 B 
X TRIM2_0 20 800 400 200 L 40 40 0 0 B 
X VSS 21 800 -1200 200 L 40 40 0 0 W 
X VSS 33 800 -1200 200 L 40 40 0 0 W 
X RFI1 22 -800 800 200 R 40 40 0 0 I 
X RFI2 23 -800 700 200 R 40 40 0 0 I 
X AGD 24 -800 -800 200 R 40 40 0 0 B 
X CSI 25 -800 200 200 R 40 40 0 0 I 
X VSN_A 26 800 -900 200 L 40 40 0 0 W 
X IRQ 27 -800 -500 200 R 40 40 0 0 O 
X MCU_CLK 28 -800 -600 200 R 40 40 0 0 O C
X MISO 29 -800 -200 200 R 40 40 0 0 O 
X MOSI 30 -800 -300 200 R 40 40 0 0 I 
X SCLK 31 -800 -400 200 R 40 40 0 0 I C
X ~SS 32 -800 -100 200 R 40 40 0 0 I 
ENDDRAW
ENDDEF
#
# End Library