Versuch in Prototyp001 verschoben

This commit is contained in:
Toberfra 2022-03-21 18:22:33 +01:00
parent 71cfbbb376
commit 5ade1ef5ea
78 changed files with 31 additions and 84690 deletions

2
.gitmodules vendored
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@ -1,3 +1,3 @@
[submodule "Konzept/Versuche/KiCad/Layout einfache Relaisschaltung 001/esp32_lib"] [submodule "Konzept/Versuche/KiCad/Layout einfache Relaisschaltung 001/esp32_lib"]
path = Konzept/Versuche/KiCad/Layout einfache Relaisschaltung 001/esp32_lib path = KiCad/esp32_lib
url = https://github.com/espressif/kicad-libraries url = https://github.com/espressif/kicad-libraries

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@ -895,7 +895,6 @@
) )
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View File

@ -983,21 +983,21 @@
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@ -497,7 +497,7 @@
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View File

@ -751,7 +751,7 @@
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@ -824,7 +824,7 @@
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View File

@ -591,7 +591,6 @@
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View File

@ -379,7 +379,6 @@
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*-backups/
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Generic_Conn_01x06
#
DEF Connector_Generic_Conn_01x06 J 0 40 Y N 1 F N
F0 "J" 0 300 50 H V C CNN
F1 "Connector_Generic_Conn_01x06" 0 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 50 -350 1 1 10 f
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_2 2 -200 100 150 R 50 50 1 1 P
X Pin_3 3 -200 0 150 R 50 50 1 1 P
X Pin_4 4 -200 -100 150 R 50 50 1 1 P
X Pin_5 5 -200 -200 150 R 50 50 1 1 P
X Pin_6 6 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Jumper_NO_Small
#
DEF Device_Jumper_NO_Small JP 0 30 N N 1 F N
F0 "JP" 0 80 50 H V C CNN
F1 "Device_Jumper_NO_Small" 10 -60 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SolderJumper*Open*
$ENDFPLIST
DRAW
C -40 0 20 0 1 0 N
C 40 0 20 0 1 0 N
X 1 1 -100 0 40 R 50 50 0 1 P
X 2 2 100 0 40 L 50 50 0 1 P
ENDDRAW
ENDDEF
#
# Diode_1N4001
#
DEF Diode_1N4001 D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Diode_1N4001" 0 -100 50 H V C CNN
F2 "Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal" 0 -175 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 1N4002 1N4003 1N4004 1N4005 1N4006 1N4007 BA157 BA158 BA159
$FPLIST
D*DO?41*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Driver_Relay_DRV8860_PWPR
#
DEF Driver_Relay_DRV8860_PWPR U 0 40 Y Y 1 F N
F0 "U" 400 700 50 H V L CNN
F1 "Driver_Relay_DRV8860_PWPR" 400 600 50 H V L CNN
F2 "Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm" 400 500 50 H I L CNN
F3 "" 0 -100 50 H I C CNN
$FPLIST
TSSOP*4.4x5mm*P0.65mm*
$ENDFPLIST
DRAW
S -400 600 400 -500 0 1 10 f
X VM 1 0 700 100 D 50 50 1 1 W
X OUT7 10 500 -200 100 L 50 50 1 1 O
X OUT6 11 500 -100 100 L 50 50 1 1 O
X OUT5 12 500 0 100 L 50 50 1 1 O
X OUT4 13 500 100 100 L 50 50 1 1 O
X OUT3 14 500 200 100 L 50 50 1 1 O
X OUT2 15 500 300 100 L 50 50 1 1 O
X OUT1 16 500 400 100 L 50 50 1 1 O
X PAD 17 100 -600 100 U 50 50 1 1 W I
X DIN 2 -500 0 100 R 50 50 1 1 I
X SCLK 3 -500 100 100 R 50 50 1 1 I C
X Latch 4 -500 200 100 R 50 50 1 1 I I
X GND 5 0 -600 100 U 50 50 1 1 W
X DOUT 6 -500 -100 100 R 50 50 1 1 O
X FAULT 7 -500 -300 100 R 50 50 1 1 C I
X ENABLE 8 -500 400 100 R 50 50 1 1 I
X OUT8 9 500 -300 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# RF_Module_ESP32-PICO-D4
#
DEF RF_Module_ESP32-PICO-D4 U 0 20 Y Y 1 F N
F0 "U" -700 1550 50 H V L CNN
F1 "RF_Module_ESP32-PICO-D4" 150 1550 50 H V L CNN
F2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mm" 0 -1700 50 H I C CNN
F3 "" 250 -1000 50 H I C CNN
$FPLIST
QFN*1EP*7x7mm*P0.5mm*
$ENDFPLIST
DRAW
S -700 1500 700 -1500 0 1 10 f
X VDDA 1 -200 1600 100 D 50 50 0 0 W
X IO34 10 800 -1000 100 L 50 50 0 0 I
X IO35 11 800 -1100 100 L 50 50 0 0 I
X IO32 12 800 -800 100 L 50 50 0 0 B
X IO33 13 800 -900 100 L 50 50 0 0 B
X IO25 14 800 -500 100 L 50 50 0 0 B
X IO26 15 800 -600 100 L 50 50 0 0 B
X IO27 16 800 -700 100 L 50 50 0 0 B
X IO14 17 800 200 100 L 50 50 0 0 B
X IO12 18 800 400 100 L 50 50 0 0 B
X VDD3P3_RTC 19 0 1600 100 D 50 50 0 0 W
X LNA_IN 2 800 1400 100 L 50 50 0 0 B
X IO13 20 800 300 100 L 50 50 0 0 B
X IO15 21 800 100 100 L 50 50 0 0 B
X IO2 22 800 1000 100 L 50 50 0 0 B
X IO0 23 800 1200 100 L 50 50 0 0 B
X IO4 24 800 800 100 L 50 50 0 0 B
X IO16 25 -800 0 100 R 50 50 0 0 B
X VDD_SDIO 26 800 -1300 100 L 50 50 0 0 w
X IO17 27 -800 -100 100 R 50 50 0 0 B
X SD2/IO9 28 800 600 100 L 50 50 0 0 B
X SD3/IO10 29 800 500 100 L 50 50 0 0 B
X VDDA3P3 3 -100 1600 100 D 50 50 0 0 W
X CMD 30 -800 -500 100 R 50 50 0 0 B
X CLK 31 -800 -400 100 R 50 50 0 0 B
X SD0 32 -800 -200 100 R 50 50 0 0 B
X SD1 33 -800 -300 100 R 50 50 0 0 B
X IO5 34 800 700 100 L 50 50 0 0 B
X IO18 35 800 0 100 L 50 50 0 0 B
X IO23 36 800 -400 100 L 50 50 0 0 B
X VDD3P3_CPU 37 100 1600 100 D 50 50 0 0 W
X IO19 38 800 -100 100 L 50 50 0 0 B
X IO22 39 800 -300 100 L 50 50 0 0 B
X VDDA3P3 4 -100 1600 100 D 50 50 0 0 P N
X U0RXD/IO3 40 800 900 100 L 50 50 0 0 B
X U0TXD/IO1 41 800 1100 100 L 50 50 0 0 B
X IO21 42 800 -200 100 L 50 50 0 0 B
X VDDA 43 -200 1600 100 D 50 50 0 0 P N
X XTAL_N_NC 44 -700 -1000 100 R 50 50 0 0 N N
X XTAL_P_NC 45 -700 -1100 100 R 50 50 0 0 N N
X VDDA 46 -200 1600 100 D 50 50 0 0 P N
X CAP2_NC 47 -700 -1200 100 R 50 50 0 0 N N
X CAP1_NC 48 -700 -1300 100 R 50 50 0 0 N N
X GND 49 0 -1600 100 U 50 50 0 0 W
X SENSOR_VP 5 -800 1200 100 R 50 50 0 0 I
X SENSOR_CAPP 6 -800 1100 100 R 50 50 0 0 I
X SENSOR_CAPN 7 -800 1000 100 R 50 50 0 0 I
X SENSOR_VN 8 -800 900 100 R 50 50 0 0 I
X EN 9 -800 1400 100 R 50 50 0 0 I
ENDDRAW
ENDDEF
#
# Relay_FINDER-40.52
#
DEF Relay_FINDER-40.52 K 0 20 Y Y 1 F N
F0 "K" 650 150 50 H V L CNN
F1 "Relay_FINDER-40.52" 650 50 50 H V L CNN
F2 "Relay_THT:Relay_DPDT_Finder_40.52" 1350 -30 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS FINDER-41.52 FINDER-44.52 FINDER-44.62 RSM822 RM84
$FPLIST
Relay*DPDT*Finder*40.52*
$ENDFPLIST
DRAW
S -600 200 600 -200 0 1 10 f
S -525 75 -275 -75 0 1 10 N
P 2 0 1 10 -500 -75 -300 75 N
P 2 0 1 0 -400 -200 -400 -75 N
P 2 0 1 0 -400 200 -400 75 N
P 2 0 1 10 -275 0 -250 0 N
P 2 0 1 10 -225 0 -200 0 N
P 2 0 1 10 -175 0 -150 0 N
P 2 0 1 10 -125 0 -100 0 N
P 2 0 1 10 -75 0 -50 0 N
P 2 0 1 10 -25 0 0 0 N
P 2 0 1 20 0 -100 -75 150 N
P 2 0 1 0 0 -100 0 -200 N
P 2 0 1 10 25 0 50 0 N
P 2 0 1 10 75 0 100 0 N
P 2 0 1 10 125 0 150 0 N
P 2 0 1 10 175 0 200 0 N
P 2 0 1 10 225 0 250 0 N
P 2 0 1 10 275 0 300 0 N
P 2 0 1 10 325 0 350 0 N
P 2 0 1 20 400 -100 325 150 N
P 2 0 1 0 400 -100 400 -200 N
P 4 0 1 0 -100 200 -100 100 -75 125 -100 150 F
P 4 0 1 0 100 200 100 100 75 125 100 150 N
P 4 0 1 0 300 200 300 100 325 125 300 150 F
P 4 0 1 0 500 200 500 100 475 125 500 150 N
X ~ 11 0 -300 100 U 50 50 1 1 P
X ~ 12 -100 300 100 D 50 50 1 1 P
X ~ 14 100 300 100 D 50 50 1 1 P
X ~ 21 400 -300 100 U 50 50 1 1 P
X ~ 22 300 300 100 D 50 50 1 1 P
X ~ 24 500 300 100 D 50 50 1 1 P
X ~ A1 -400 300 100 D 50 50 1 1 P
X ~ A2 -400 -300 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+12V
#
DEF power_+12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

View File

@ -1,84 +0,0 @@
(kicad_pcb (version 20211014) (generator pcbnew)
(general
(thickness 1.6)
)
(paper "A4")
(layers
(0 "F.Cu" signal)
(31 "B.Cu" signal)
(32 "B.Adhes" user "B.Adhesive")
(33 "F.Adhes" user "F.Adhesive")
(34 "B.Paste" user)
(35 "F.Paste" user)
(36 "B.SilkS" user "B.Silkscreen")
(37 "F.SilkS" user "F.Silkscreen")
(38 "B.Mask" user)
(39 "F.Mask" user)
(40 "Dwgs.User" user "User.Drawings")
(41 "Cmts.User" user "User.Comments")
(42 "Eco1.User" user "User.Eco1")
(43 "Eco2.User" user "User.Eco2")
(44 "Edge.Cuts" user)
(45 "Margin" user)
(46 "B.CrtYd" user "B.Courtyard")
(47 "F.CrtYd" user "F.Courtyard")
(48 "B.Fab" user)
(49 "F.Fab" user)
)
(setup
(stackup
(layer "F.SilkS" (type "Top Silk Screen"))
(layer "F.Paste" (type "Top Solder Paste"))
(layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
(layer "F.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "B.Cu" (type "copper") (thickness 0.035))
(layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
(layer "B.Paste" (type "Bottom Solder Paste"))
(layer "B.SilkS" (type "Bottom Silk Screen"))
(copper_finish "None")
(dielectric_constraints no)
)
(pad_to_mask_clearance 0.2)
(grid_origin 55.08 144.93)
(pcbplotparams
(layerselection 0x0000030_ffffffff)
(disableapertmacros false)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(svguseinch false)
(svgprecision 6)
(excludeedgelayer true)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(dxfpolygonmode true)
(dxfimperialunits true)
(dxfusepcbnewfont true)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(sketchpadsonfab false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "")
)
)
(net 0 "")
)

View File

@ -1,75 +0,0 @@
{
"board": {
"active_layer": 0,
"active_layer_preset": "Alle Lagen",
"auto_track_width": true,
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": true,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
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],
"visible_layers": "fffffff_ffffffff",
"zone_display_mode": 0
},
"meta": {
"filename": "Relaisplatzierung001.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}

View File

@ -1,502 +0,0 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
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"min_clearance": 0.508
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
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"max_error": 0.005,
"min_clearance": 0.0,
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"min_hole_clearance": 0.25,
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"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
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},
"track_widths": [
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6.0
],
"via_dimensions": [
{
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}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
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},
"erc": {
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"no_connect_dangling": "warning",
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"pin_to_pin": "warning",
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"wire_dangling": "error"
}
},
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"pinned_symbol_libs": []
},
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"version": 1
},
"net_settings": {
"classes": [
{
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"clearance": 0.3,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.3,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
},
{
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"line_style": 0,
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"microvia_drill": 0.1,
"name": "Ausgangstrom",
"nets": [
"/Relais/A",
"/Relais/B",
"/Relais/J1Pin2",
"/Relais/J2Pin2",
"/Relais/K1com1",
"/Relais/K1com2",
"/Relais/K1nc1",
"/Relais/K1nc2",
"/Relais/K1no1",
"/Relais/K1no2",
"/Relais/K2com1",
"/Relais/K2com2",
"/Relais/K2nc1",
"/Relais/K2nc2",
"/Relais/K2no1",
"/Relais/K2no2"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 1.0,
"via_diameter": 1.2,
"via_drill": 0.8,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 10,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"7aed3a71-054b-4aaa-9c0a-030523c32827",
""
],
[
"00000000-0000-0000-0000-0000621dcc08",
"Relais"
],
[
"00000000-0000-0000-0000-00006234f332",
"sheet6234F32C"
],
[
"00000000-0000-0000-0000-00006234f398",
"sheet6234F392"
],
[
"00000000-0000-0000-0000-00006234f44e",
"sheet6234F448"
],
[
"00000000-0000-0000-0000-00006234f73c",
"sheet6234F733"
],
[
"00000000-0000-0000-0000-00006234f742",
"sheet6234F734"
],
[
"00000000-0000-0000-0000-00006234f748",
"sheet6234F735"
],
[
"00000000-0000-0000-0000-00006234f74e",
"sheet6234F736"
]
],
"text_variables": {}
}

View File

@ -1,257 +0,0 @@
update=Sa 19 Feb 2022 15:20:23 CET
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[general]
version=1
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.3
TrackWidth2=6
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.2
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.3
TrackWidth=0.3
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Ausgangstrom
Clearance=1.8
TrackWidth=3
ViaDiameter=1.2
ViaDrill=0.8
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

View File

@ -1,398 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 9
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
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NoConn ~ 650 7700
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U 621DCC08
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$EndSheet
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U 6234F742
F0 "sheet6234F734" 24
F1 "Relais2x.sch" 24
F2 "A" I L 10350 3200 39
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$EndSheet
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U 6234F748
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$EndSheet
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U 6234F74E
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F3 "B" I L 10350 4150 39
F4 "Relais1" I L 10350 4250 39
F5 "Relais2" I L 10350 4300 39
$EndSheet
Wire Wire Line
10350 750 10250 750
Wire Wire Line
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Connection ~ 10250 750
Wire Wire Line
10250 4100 10350 4100
Wire Wire Line
10350 3650 10250 3650
Connection ~ 10250 3650
Wire Wire Line
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Wire Wire Line
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Connection ~ 10250 3200
Wire Wire Line
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Wire Wire Line
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Connection ~ 10250 2750
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Wire Wire Line
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Connection ~ 10250 2100
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Wire Wire Line
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Wire Wire Line
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Connection ~ 10250 1200
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 10200 800
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Connection ~ 10200 3700
Wire Wire Line
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Wire Wire Line
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Connection ~ 10200 3250
Wire Wire Line
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Wire Wire Line
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Connection ~ 10200 2800
Wire Wire Line
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Wire Wire Line
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Connection ~ 10200 2150
Wire Wire Line
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Wire Wire Line
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Connection ~ 10200 1700
Wire Wire Line
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Wire Wire Line
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Connection ~ 10200 1250
Wire Wire Line
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$Comp
L Driver_Relay:DRV8860_PWPR U102
U 1 1 623582EF
P 9250 3450
F 0 "U102" H 9250 4331 50 0000 C CNN
F 1 "DRV8860_PWPR" H 9250 4240 50 0000 C CNN
F 2 "Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm" H 9650 3950 50 0001 L CNN
F 3 "http://www.ti.com/lit/ds/symlink/drv8860.pdf" H 9250 3350 50 0001 C CNN
1 9250 3450
1 0 0 -1
$EndComp
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 8550 1550
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Connection ~ 8500 1650
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 8450 2050
Wire Wire Line
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Connection ~ 8600 1450
Wire Wire Line
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$Comp
L power:GND #PWR0104
U 1 1 6238D77F
P 9250 4150
F 0 "#PWR0104" H 9250 3900 50 0001 C CNN
F 1 "GND" H 9255 3977 50 0000 C CNN
F 2 "" H 9250 4150 50 0001 C CNN
F 3 "" H 9250 4150 50 0001 C CNN
1 9250 4150
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0103
U 1 1 6238D8D4
P 9250 2400
F 0 "#PWR0103" H 9250 2150 50 0001 C CNN
F 1 "GND" H 9255 2227 50 0000 C CNN
F 2 "" H 9250 2400 50 0001 C CNN
F 3 "" H 9250 2400 50 0001 C CNN
1 9250 2400
1 0 0 -1
$EndComp
$Comp
L Driver_Relay:DRV8860_PWPR U101
U 1 1 623577D8
P 9250 1750
F 0 "U101" H 9250 2631 50 0000 C CNN
F 1 "DRV8860_PWPR" H 9250 2540 50 0000 C CNN
F 2 "Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm" H 9650 2250 50 0001 L CNN
F 3 "http://www.ti.com/lit/ds/symlink/drv8860.pdf" H 9250 1650 50 0001 C CNN
1 9250 1750
1 0 0 -1
$EndComp
$Comp
L power:+12V #PWR0101
U 1 1 6238FA90
P 9150 1050
F 0 "#PWR0101" H 9150 900 50 0001 C CNN
F 1 "+12V" V 9165 1178 50 0000 L CNN
F 2 "" H 9150 1050 50 0001 C CNN
F 3 "" H 9150 1050 50 0001 C CNN
1 9150 1050
0 -1 -1 0
$EndComp
$Comp
L power:+12V #PWR0102
U 1 1 6239004B
P 9150 2750
F 0 "#PWR0102" H 9150 2600 50 0001 C CNN
F 1 "+12V" V 9165 2878 50 0000 L CNN
F 2 "" H 9150 2750 50 0001 C CNN
F 3 "" H 9150 2750 50 0001 C CNN
1 9150 2750
0 -1 -1 0
$EndComp
Wire Wire Line
7900 750 10250 750
Wire Wire Line
9800 800 9800 850
Wire Wire Line
9800 850 7900 850
Wire Wire Line
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Wire Wire Line
9250 2750 9150 2750
$Comp
L RF_Module:ESP32-PICO-D4 U103
U 1 1 62116121
P 3050 2550
F 0 "U103" H 3050 861 50 0000 C CNN
F 1 "ESP32-PICO-D4" H 3050 770 50 0000 C CNN
F 2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mm" H 3050 850 50 0001 C CNN
F 3 "https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf" H 3300 1550 50 0001 C CNN
1 3050 2550
1 0 0 -1
$EndComp
$EndSCHEMATC

View File

@ -1,2 +0,0 @@
(kicad_pcb (version 20211014) (generator pcbnew)
)

View File

@ -1,75 +0,0 @@
{
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"footprints": true,
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},
"project": {
"files": []
}
}

View File

@ -1,321 +0,0 @@
{
"board": {
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},
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"rules": {
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},
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},
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},
"boards": [],
"cvpcb": {
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},
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"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
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View File

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View File

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View File

@ -1,137 +0,0 @@
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(reference "JP222") (unit 1) (value "Jumper_2_Open") (footprint "Connector_PinSocket_2.54mm:PinSocket_1x02_P2.54mm_Vertical")
)
(path "/efc35da1-a63a-4255-80cb-ee36b2acd693/1dfbb08e-4502-4041-b288-07dbab29f6fa"
(reference "K201") (unit 1) (value "FINDER-40.52") (footprint "Relay_THT:Relay_DPDT_Finder_40.52")
)
(path "/efc35da1-a63a-4255-80cb-ee36b2acd693/2a67f428-4957-448f-b1d3-9c0cd5385423"
(reference "K202") (unit 1) (value "FINDER-40.52") (footprint "Relay_THT:Relay_DPDT_Finder_40.52")
)
)
)