63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
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#ifndef __INC_CLOCKLESS_ARM_D51
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#define __INC_CLOCKLESS_ARM_D51
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// D51 is an M4 chip, however the M0 clockless logic seems to work.
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#include "../common/m0clockless.h"
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FASTLED_NAMESPACE_BEGIN
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#define FASTLED_HAS_CLOCKLESS 1
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template <uint8_t DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 50>
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class ClocklessController : public CPixelLEDController<RGB_ORDER> {
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typedef typename FastPinBB<DATA_PIN>::port_ptr_t data_ptr_t;
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typedef typename FastPinBB<DATA_PIN>::port_t data_t;
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data_t mPinMask;
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data_ptr_t mPort;
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CMinWait<WAIT_TIME> mWait;
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public:
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virtual void init() {
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FastPinBB<DATA_PIN>::setOutput();
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mPinMask = FastPinBB<DATA_PIN>::mask();
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mPort = FastPinBB<DATA_PIN>::port();
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}
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virtual uint16_t getMaxRefreshRate() const { return 400; }
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virtual void showPixels(PixelController<RGB_ORDER> & pixels) {
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mWait.wait();
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cli();
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if(!showRGBInternal(pixels)) {
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sei(); delayMicroseconds(WAIT_TIME); cli();
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showRGBInternal(pixels);
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}
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sei();
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mWait.mark();
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}
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// This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then
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// gcc will use register Y for the this pointer.
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static uint32_t showRGBInternal(PixelController<RGB_ORDER> pixels) {
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struct M0ClocklessData data;
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data.d[0] = pixels.d[0];
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data.d[1] = pixels.d[1];
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data.d[2] = pixels.d[2];
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data.s[0] = pixels.mScale[0];
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data.s[1] = pixels.mScale[1];
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data.s[2] = pixels.mScale[2];
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data.e[0] = pixels.e[0];
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data.e[1] = pixels.e[1];
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data.e[2] = pixels.e[2];
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data.adj = pixels.mAdvance;
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typename FastPin<DATA_PIN>::port_ptr_t portBase = FastPin<DATA_PIN>::port();
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return showLedData<8,4,T1,T2,T3,RGB_ORDER, WAIT_TIME>(portBase, FastPin<DATA_PIN>::mask(), pixels.mData, pixels.mLen, &data);
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}
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};
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FASTLED_NAMESPACE_END
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#endif // __INC_CLOCKLESS_ARM_D51
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