127 lines
3.8 KiB
C++
127 lines
3.8 KiB
C++
#ifndef __INC_CLOCKLESS_ARM_STM32_H
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#define __INC_CLOCKLESS_ARM_STM32_H
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FASTLED_NAMESPACE_BEGIN
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// Definition for a single channel clockless controller for the stm32 family of chips, like that used in the spark core
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// See clockless.h for detailed info on how the template parameters are used.
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#define FASTLED_HAS_CLOCKLESS 1
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template <int DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 50>
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class ClocklessController : public CPixelLEDController<RGB_ORDER> {
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typedef typename FastPin<DATA_PIN>::port_ptr_t data_ptr_t;
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typedef typename FastPin<DATA_PIN>::port_t data_t;
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data_t mPinMask;
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data_ptr_t mPort;
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CMinWait<WAIT_TIME> mWait;
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public:
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virtual void init() {
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FastPin<DATA_PIN>::setOutput();
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mPinMask = FastPin<DATA_PIN>::mask();
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mPort = FastPin<DATA_PIN>::port();
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}
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virtual uint16_t getMaxRefreshRate() const { return 400; }
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protected:
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virtual void showPixels(PixelController<RGB_ORDER> & pixels) {
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mWait.wait();
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if(!showRGBInternal(pixels)) {
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sei(); delayMicroseconds(WAIT_TIME); cli();
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showRGBInternal(pixels);
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}
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mWait.mark();
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}
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#define _CYCCNT (*(volatile uint32_t*)(0xE0001004UL))
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template<int BITS> __attribute__ ((always_inline)) inline static void writeBits(register uint32_t & next_mark, register data_ptr_t port, register data_t hi, register data_t lo, register uint8_t & b) {
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for(register uint32_t i = BITS-1; i > 0; i--) {
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while(_CYCCNT < (T1+T2+T3-20));
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FastPin<DATA_PIN>::fastset(port, hi);
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_CYCCNT = 4;
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if(b&0x80) {
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while(_CYCCNT < (T1+T2-20));
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FastPin<DATA_PIN>::fastset(port, lo);
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} else {
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while(_CYCCNT < (T1-10));
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FastPin<DATA_PIN>::fastset(port, lo);
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}
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b <<= 1;
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}
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while(_CYCCNT < (T1+T2+T3-20));
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FastPin<DATA_PIN>::fastset(port, hi);
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_CYCCNT = 4;
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if(b&0x80) {
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while(_CYCCNT < (T1+T2-20));
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FastPin<DATA_PIN>::fastset(port, lo);
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} else {
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while(_CYCCNT < (T1-10));
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FastPin<DATA_PIN>::fastset(port, lo);
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}
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}
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// This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then
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// gcc will use register Y for the this pointer.
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static uint32_t showRGBInternal(PixelController<RGB_ORDER> pixels) {
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// Get access to the clock
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
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DWT->CYCCNT = 0;
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register data_ptr_t port = FastPin<DATA_PIN>::port();
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register data_t hi = *port | FastPin<DATA_PIN>::mask();;
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register data_t lo = *port & ~FastPin<DATA_PIN>::mask();;
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*port = lo;
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// Setup the pixel controller and load/scale the first byte
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pixels.preStepFirstByteDithering();
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register uint8_t b = pixels.loadAndScale0();
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cli();
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uint32_t next_mark = (T1+T2+T3);
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DWT->CYCCNT = 0;
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while(pixels.has(1)) {
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pixels.stepDithering();
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#if (FASTLED_ALLOW_INTERRUPTS == 1)
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cli();
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// if interrupts took longer than 45µs, punt on the current frame
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if(DWT->CYCCNT > next_mark) {
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if((DWT->CYCCNT-next_mark) > ((WAIT_TIME-INTERRUPT_THRESHOLD)*CLKS_PER_US)) { sei(); return 0; }
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}
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hi = *port | FastPin<DATA_PIN>::mask();
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lo = *port & ~FastPin<DATA_PIN>::mask();
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#endif
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// Write first byte, read next byte
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writeBits<8+XTRA0>(next_mark, port, hi, lo, b);
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b = pixels.loadAndScale1();
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// Write second byte, read 3rd byte
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writeBits<8+XTRA0>(next_mark, port, hi, lo, b);
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b = pixels.loadAndScale2();
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// Write third byte, read 1st byte of next pixel
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writeBits<8+XTRA0>(next_mark, port, hi, lo, b);
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b = pixels.advanceAndLoadAndScale0();
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#if (FASTLED_ALLOW_INTERRUPTS == 1)
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sei();
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#endif
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};
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sei();
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return DWT->CYCCNT;
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}
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};
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FASTLED_NAMESPACE_END
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#endif
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