253 lines
8.5 KiB
C++
253 lines
8.5 KiB
C++
#ifndef __INC_FASTSPI_ARM_KL26_H
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#define __INC_FASTSPI_ARM_KL26_h
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FASTLED_NAMESPACE_BEGIN
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template <int VAL> void getScalars(uint8_t & sppr, uint8_t & spr) {
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if(VAL > 4096) { sppr=7; spr=8; }
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else if(VAL > 3584) { sppr=6; spr=8; }
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else if(VAL > 3072) { sppr=5; spr=8; }
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else if(VAL > 2560) { sppr=4; spr=8; }
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else if(VAL > 2048) { sppr=7; spr=7; }
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else if(VAL > 2048) { sppr=3; spr=8; }
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else if(VAL > 1792) { sppr=6; spr=7; }
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else if(VAL > 1536) { sppr=5; spr=7; }
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else if(VAL > 1536) { sppr=2; spr=8; }
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else if(VAL > 1280) { sppr=4; spr=7; }
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else if(VAL > 1024) { sppr=7; spr=6; }
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else if(VAL > 1024) { sppr=3; spr=7; }
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else if(VAL > 1024) { sppr=1; spr=8; }
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else if(VAL > 896) { sppr=6; spr=6; }
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else if(VAL > 768) { sppr=5; spr=6; }
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else if(VAL > 768) { sppr=2; spr=7; }
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else if(VAL > 640) { sppr=4; spr=6; }
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else if(VAL > 512) { sppr=7; spr=5; }
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else if(VAL > 512) { sppr=3; spr=6; }
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else if(VAL > 512) { sppr=1; spr=7; }
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else if(VAL > 512) { sppr=0; spr=8; }
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else if(VAL > 448) { sppr=6; spr=5; }
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else if(VAL > 384) { sppr=5; spr=5; }
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else if(VAL > 384) { sppr=2; spr=6; }
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else if(VAL > 320) { sppr=4; spr=5; }
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else if(VAL > 256) { sppr=7; spr=4; }
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else if(VAL > 256) { sppr=3; spr=5; }
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else if(VAL > 256) { sppr=1; spr=6; }
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else if(VAL > 256) { sppr=0; spr=7; }
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else if(VAL > 224) { sppr=6; spr=4; }
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else if(VAL > 192) { sppr=5; spr=4; }
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else if(VAL > 192) { sppr=2; spr=5; }
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else if(VAL > 160) { sppr=4; spr=4; }
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else if(VAL > 128) { sppr=7; spr=3; }
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else if(VAL > 128) { sppr=3; spr=4; }
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else if(VAL > 128) { sppr=1; spr=5; }
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else if(VAL > 128) { sppr=0; spr=6; }
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else if(VAL > 112) { sppr=6; spr=3; }
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else if(VAL > 96) { sppr=5; spr=3; }
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else if(VAL > 96) { sppr=2; spr=4; }
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else if(VAL > 80) { sppr=4; spr=3; }
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else if(VAL > 64) { sppr=7; spr=2; }
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else if(VAL > 64) { sppr=3; spr=3; }
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else if(VAL > 64) { sppr=1; spr=4; }
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else if(VAL > 64) { sppr=0; spr=5; }
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else if(VAL > 56) { sppr=6; spr=2; }
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else if(VAL > 48) { sppr=5; spr=2; }
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else if(VAL > 48) { sppr=2; spr=3; }
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else if(VAL > 40) { sppr=4; spr=2; }
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else if(VAL > 32) { sppr=7; spr=1; }
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else if(VAL > 32) { sppr=3; spr=2; }
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else if(VAL > 32) { sppr=1; spr=3; }
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else if(VAL > 32) { sppr=0; spr=4; }
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else if(VAL > 28) { sppr=6; spr=1; }
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else if(VAL > 24) { sppr=5; spr=1; }
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else if(VAL > 24) { sppr=2; spr=2; }
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else if(VAL > 20) { sppr=4; spr=1; }
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else if(VAL > 16) { sppr=7; spr=0; }
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else if(VAL > 16) { sppr=3; spr=1; }
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else if(VAL > 16) { sppr=1; spr=2; }
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else if(VAL > 16) { sppr=0; spr=3; }
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else if(VAL > 14) { sppr=6; spr=0; }
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else if(VAL > 12) { sppr=5; spr=0; }
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else if(VAL > 12) { sppr=2; spr=1; }
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else if(VAL > 10) { sppr=4; spr=0; }
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else if(VAL > 8) { sppr=3; spr=0; }
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else if(VAL > 8) { sppr=1; spr=1; }
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else if(VAL > 8) { sppr=0; spr=2; }
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else if(VAL > 6) { sppr=2; spr=0; }
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else if(VAL > 4) { sppr=1; spr=0; }
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else if(VAL > 4) { sppr=0; spr=1; }
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else /* if(VAL > 2) */ { sppr=0; spr=0; }
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}
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#define SPIX (*(KINETISL_SPI_t*)pSPIX)
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#define ARM_HARDWARE_SPI
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template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint8_t _SPI_CLOCK_DIVIDER, uint32_t pSPIX>
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class ARMHardwareSPIOutput {
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Selectable *m_pSelect;
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static inline void enable_pins(void) __attribute__((always_inline)) {
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switch(_DATA_PIN) {
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case 0: CORE_PIN0_CONFIG = PORT_PCR_MUX(2); break;
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case 1: CORE_PIN1_CONFIG = PORT_PCR_MUX(5); break;
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case 7: CORE_PIN7_CONFIG = PORT_PCR_MUX(2); break;
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case 8: CORE_PIN8_CONFIG = PORT_PCR_MUX(5); break;
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case 11: CORE_PIN11_CONFIG = PORT_PCR_MUX(2); break;
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case 12: CORE_PIN12_CONFIG = PORT_PCR_MUX(5); break;
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case 21: CORE_PIN21_CONFIG = PORT_PCR_MUX(2); break;
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}
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switch(_CLOCK_PIN) {
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case 13: CORE_PIN13_CONFIG = PORT_PCR_MUX(2); break;
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case 14: CORE_PIN14_CONFIG = PORT_PCR_MUX(2); break;
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case 20: CORE_PIN20_CONFIG = PORT_PCR_MUX(2); break;
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}
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}
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static inline void disable_pins(void) __attribute((always_inline)) {
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switch(_DATA_PIN) {
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case 0: CORE_PIN0_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 1: CORE_PIN1_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 7: CORE_PIN7_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 8: CORE_PIN8_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 11: CORE_PIN11_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 12: CORE_PIN12_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 21: CORE_PIN21_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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}
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switch(_CLOCK_PIN) {
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case 13: CORE_PIN13_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 14: CORE_PIN14_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 20: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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}
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}
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void setSPIRate() {
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uint8_t sppr, spr;
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getScalars<_SPI_CLOCK_DIVIDER>(sppr, spr);
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// Set the speed
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SPIX.BR = SPI_BR_SPPR(sppr) | SPI_BR_SPR(spr);
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// Also, force 8 bit transfers (don't want to juggle 8/16 since that flushes the world)
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SPIX.C2 = 0;
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SPIX.C1 |= SPI_C1_SPE;
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}
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public:
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ARMHardwareSPIOutput() { m_pSelect = NULL; }
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ARMHardwareSPIOutput(Selectable *pSelect) { m_pSelect = pSelect; }
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// set the object representing the selectable
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void setSelect(Selectable *pSelect) { m_pSelect = pSelect; }
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// initialize the SPI subssytem
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void init() {
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FastPin<_DATA_PIN>::setOutput();
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FastPin<_CLOCK_PIN>::setOutput();
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// Enable the SPI clocks
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uint32_t sim4 = SIM_SCGC4;
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if ((pSPIX == 0x40076000) && !(sim4 & SIM_SCGC4_SPI0)) {
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SIM_SCGC4 = sim4 | SIM_SCGC4_SPI0;
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}
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if ( (pSPIX == 0x40077000) && !(sim4 & SIM_SCGC4_SPI1)) {
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SIM_SCGC4 = sim4 | SIM_SCGC4_SPI1;
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}
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SPIX.C1 = SPI_C1_MSTR | SPI_C1_SPE;
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SPIX.C2 = 0;
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SPIX.BR = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
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}
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// latch the CS select
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void inline select() __attribute__((always_inline)) {
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if(m_pSelect != NULL) { m_pSelect->select(); }
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setSPIRate();
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enable_pins();
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}
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// release the CS select
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void inline release() __attribute__((always_inline)) {
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disable_pins();
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if(m_pSelect != NULL) { m_pSelect->release(); }
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}
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// Wait for the world to be clear
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static void wait() __attribute__((always_inline)) { while(!(SPIX.S & SPI_S_SPTEF)); }
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// wait until all queued up data has been written
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void waitFully() { wait(); }
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// not the most efficient mechanism in the world - but should be enough for sm16716 and friends
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template <uint8_t BIT> inline static void writeBit(uint8_t b) { /* TODO */ }
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// write a byte out via SPI (returns immediately on writing register)
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static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); SPIX.DL = b; }
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// write a word out via SPI (returns immediately on writing register)
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static void writeWord(uint16_t w) __attribute__((always_inline)) { writeByte(w>>8); writeByte(w & 0xFF); }
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// A raw set of writing byte values, assumes setup/init/waiting done elsewhere (static for use by adjustment classes)
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static void writeBytesValueRaw(uint8_t value, int len) {
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while(len--) { writeByte(value); }
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}
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// A full cycle of writing a value for len bytes, including select, release, and waiting
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void writeBytesValue(uint8_t value, int len) {
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setSPIRate();
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select();
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while(len--) {
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writeByte(value);
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}
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waitFully();
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release();
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}
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// A full cycle of writing a raw block of data out, including select, release, and waiting
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template <class D> void writeBytes(register uint8_t *data, int len) {
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setSPIRate();
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uint8_t *end = data + len;
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select();
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// could be optimized to write 16bit words out instead of 8bit bytes
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while(data != end) {
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writeByte(D::adjust(*data++));
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}
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D::postBlock(len);
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waitFully();
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release();
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}
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void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }
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template <uint8_t FLAGS, class D, EOrder RGB_ORDER> void writePixels(PixelController<RGB_ORDER> pixels) {
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int len = pixels.mLen;
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select();
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while(pixels.has(1)) {
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if(FLAGS & FLAG_START_BIT) {
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writeBit<0>(1);
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writeByte(D::adjust(pixels.loadAndScale0()));
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writeByte(D::adjust(pixels.loadAndScale1()));
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writeByte(D::adjust(pixels.loadAndScale2()));
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} else {
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writeByte(D::adjust(pixels.loadAndScale0()));
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writeByte(D::adjust(pixels.loadAndScale1()));
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writeByte(D::adjust(pixels.loadAndScale2()));
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}
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pixels.advanceData();
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pixels.stepDithering();
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}
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D::postBlock(len);
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release();
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}
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};
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FASTLED_NAMESPACE_END
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#endif
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