mirror of
https://gitlab.com/fabinfra/fabhardware/FabReader2.git
synced 2025-03-12 22:51:51 +01:00
88 lines
3.0 KiB
Plaintext
88 lines
3.0 KiB
Plaintext
EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#(c) SnapEDA 2016 (snapeda.com)
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#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
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#
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# ST25R3911B-AQFT
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#
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DEF ST25R3911B-AQFT U 0 40 Y Y 1 L N
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F0 "U" -600 1230 50 H V L BNN
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F1 "ST25R3911B-AQFT" -600 -1400 50 H V L BNN
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F2 "QFN50P500X500X100-33N" 0 0 50 H I L BNN
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F3 "" 0 0 50 H I L BNN
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F4 "5.0" 0 0 50 H I L BNN "E_MAX"
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F5 "" 0 0 50 H I L BNN "BODY_DIAMETER"
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F6 "0.18" 0 0 50 H I L BNN "B_MIN"
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F7 "" 0 0 50 H I L BNN "THERMAL_PAD"
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F8 "5.0" 0 0 50 H I L BNN "E_MIN"
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F9 "" 0 0 50 H I L BNN "BALL_COLUMNS"
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F10 "" 0 0 50 H I L BNN "BALL_ROWS"
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F11 "0.3" 0 0 50 H I L BNN "L_MIN"
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F12 "6" 0 0 50 H I L BNN "PARTREV"
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F13 "0.3" 0 0 50 H I L BNN "B_MAX"
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F14 "ST Microelectronics" 0 0 50 H I L BNN "MANUFACTURER"
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F15 "" 0 0 50 H I L BNN "DMAX"
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F16 "" 0 0 50 H I L BNN "EMAX"
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F17 "5.0" 0 0 50 H I L BNN "D_MAX"
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F18 "8.0" 0 0 50 H I L BNN "PIN_COUNT_D"
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F19 "0.4" 0 0 50 H I L BNN "L_NOM"
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F20 "" 0 0 50 H I L BNN "SNAPEDA_PACKAGE_ID"
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F21 "3.5" 0 0 50 H I L BNN "E2_NOM"
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F22 "" 0 0 50 H I L BNN "IPC"
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F23 "" 0 0 50 H I L BNN "JEDEC"
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F24 "IPC 7351B" 0 0 50 H I L BNN "STANDARD"
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F25 "" 0 0 50 H I L BNN "PINS"
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F26 "3.5" 0 0 50 H I L BNN "D2_NOM"
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F27 "" 0 0 50 H I L BNN "PIN_COLUMNS"
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F28 "0.5" 0 0 50 H I L BNN "L_MAX"
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F29 "5.0" 0 0 50 H I L BNN "D_NOM"
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F30 "" 0 0 50 H I L BNN "DMIN"
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F31 "0.5" 0 0 50 H I L BNN "ENOM"
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F32 "8.0" 0 0 50 H I L BNN "PIN_COUNT_E"
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F33 "5.0" 0 0 50 H I L BNN "D_MIN"
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F34 "" 0 0 50 H I L BNN "EMIN"
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F35 "" 0 0 50 H I L BNN "DNOM"
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F36 "5.0" 0 0 50 H I L BNN "E_NOM"
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F37 "" 0 0 50 H I L BNN "PACKAGE_TYPE"
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F38 "1.0" 0 0 50 H I L BNN "A_MAX"
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F39 "" 0 0 50 H I L BNN "VACANCIES"
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F40 "0.24" 0 0 50 H I L BNN "B_NOM"
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DRAW
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S -600 -1300 600 1200 0 0 10 f
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X VDD_IO 1 800 1100 200 L 40 40 0 0 W
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X CSO 2 -800 100 200 R 40 40 0 0 O
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X VSP_D 3 800 -500 200 L 40 40 0 0 O
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X XTO 4 -800 400 200 R 40 40 0 0 O
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X XTI 5 -800 500 200 R 40 40 0 0 I
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X VSN_D 6 800 -1000 200 L 40 40 0 0 W
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X VSP_A 7 800 -400 200 L 40 40 0 0 O
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X VDD 8 800 1000 200 L 40 40 0 0 W
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X VSP_RF 9 800 -600 200 L 40 40 0 0 O
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X RFO1 10 800 800 200 L 40 40 0 0 O
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X RFO2 11 800 700 200 L 40 40 0 0 O
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X TRIM1_3 13 800 -100 200 L 40 40 0 0 B
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X VSN_RF 12 800 -1100 200 L 40 40 0 0 W
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X TRIM2_3 14 800 -200 200 L 40 40 0 0 B
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X TRIM1_2 15 800 100 200 L 40 40 0 0 B
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X TRIM2_2 16 800 0 200 L 40 40 0 0 B
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X TRIM1_1 17 800 300 200 L 40 40 0 0 B
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X TRIM2_1 18 800 200 200 L 40 40 0 0 B
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X TRIM1_0 19 800 500 200 L 40 40 0 0 B
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X TRIM2_0 20 800 400 200 L 40 40 0 0 B
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X VSS 21 800 -1200 200 L 40 40 0 0 W
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X VSS 33 800 -1200 200 L 40 40 0 0 W
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X RFI1 22 -800 800 200 R 40 40 0 0 I
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X RFI2 23 -800 700 200 R 40 40 0 0 I
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X AGD 24 -800 -800 200 R 40 40 0 0 B
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X CSI 25 -800 200 200 R 40 40 0 0 I
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X VSN_A 26 800 -900 200 L 40 40 0 0 W
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X IRQ 27 -800 -500 200 R 40 40 0 0 O
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X MCU_CLK 28 -800 -600 200 R 40 40 0 0 O C
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X MISO 29 -800 -200 200 R 40 40 0 0 O
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X MOSI 30 -800 -300 200 R 40 40 0 0 I
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X SCLK 31 -800 -400 200 R 40 40 0 0 I C
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X ~SS 32 -800 -100 200 R 40 40 0 0 I
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ENDDRAW
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ENDDEF
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#
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# End Library |